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Grideye USB

One of the key fea­tures of my microwave is Panasonic’s Grid­eye ther­mal sen­sor. This is a (rel­a­tive­ly) low cost ther­mal sen­sor that I have placed at the top of the microwave to mea­sure the sur­face tem­per­a­ture of the food.

The sen­sor is an I2C device which requires a 5V or 3.3V sup­ply. Want­i­ng to keep every­thing rel­a­tive­ly high lev­el I am imple­ment­ing it as a USB device.

For the demo I used a Bus­Pi­rate as an I2C-USB bridge. This got me through the demo but the pro­to­cols com­bine very bad­ly result­ing in a max­i­mum frame rate of about 1fps. The high laten­cy of USB com­mu­ni­ca­tions com­bines with the chat­ty­ness of I2C caus­ing every­thing to be very slow. So a prac­ti­cal imple­men­ta­tion can’t be a bridge, it must have some log­ic to con­trol the device and present a processed USB data stream.

There is an exist­ing one, Digikey has a break­out board that their Appli­ca­tion Engi­neers devel­oped. Sad­ly due to Panasonic’s lim­i­ta­tions on dis­trib­ut­ing the Grid­Eye sen­sor they only ship them with­in the US. The Appli­ca­tion Engi­neers team runs in an open hard­ware man­ner, the project page for the break­out board includes the cir­cuit dia­gram and firmware code. I got in con­tact with the author, Chris Baird, and while he didn’t have any blank PCBs he could ship he was hap­py to share the ger­ber files so I could make my own.

The sto­ry doesn’t end here though, because a sol­id dose of Not-Invent­ed-Here hit, jus­ti­fied by the twin desire to eval­u­ate KiCad and want­i­ng to imple­ment the USB Video pro­to­col, dri­ven in part by an absurd desire to shov­el yet anoth­er dri­ver into the Lin­ux Ker­nel.

As a nice bonus I reduced the cost, sig­nif­i­cant com­po­nents, exclud­ing the Grid­Eye, cost $9.81 AUD for the Digikey board com­pared to $2.60 AUD for mine. Though that it no way com­pen­sates for the time spent and comes with the dis­claimer that the Digikey board actu­al­ly works.

All files for the design being dis­cussed are avail­able at https://github.com/lod/grideye_usb_electronics.

Circuit Design

My cir­cuit design is below, I took a rather dif­fer­ent approach to the Digikey board, wiring an Atmel AVR direct­ly to the USB input. This will use V-USB, a soft­ware USB stack to com­mu­ni­cate. The ATTiny AVR used is capa­ble of run­ning V-USB on it’s inter­nal crys­tal, it should also have enough mem­o­ry allow­ing me to do USB based repro­gram­ming.

Eeschema circuit

The AVR must run off 5V in order to be fast enough to han­dle the USB com­mu­ni­ca­tions. USB com­mu­ni­ca­tions how­ev­er are a 3.3V sig­nal and while dri­ving it at 5V typ­i­cal­ly works it’s cer­tain­ly not a nice thing to do. The weak zen­ner diodes are a bidi­rec­tion­al lev­el con­ver­sion tech­nique.

The pow­er net­work actu­al­ly allows for two dif­fer­ent volt­age lev­els into the Grid­Eye. It isn’t clear from the datasheet what impact a dirty pow­er sup­ply has, so I have fit­ted an LDO to cre­ate a smooth 3.3V sig­nal. There is also a 5V Grid­Eye vari­ant (which I don’t cur­rent­ly have) that could be run direct­ly off the USB rail. To sup­port both cas­es I have an LDO designed in as well as pads for a zero ohm resis­tor to bridge the rails, one or the oth­er should be fit­ted.

The I2C bus uses an open-col­lec­tor sig­nal so nice­ly adapts to what­ev­er volt­age the Grid­Eye is pow­ered on. Run­ning at 5V the AVR reads 2.5V as high, com­fort­ably sup­port­ing 3.3V com­mu­ni­ca­tion.

I would have liked to have a spare IO to be able to dis­able the LDO in low pow­er mode. How­ev­er the Grid­Eye can be soft­ware con­fig­ured into a low pow­er state and the LDO does not con­sume much pow­er when idle. I could repur­pose the reset line for the job but that has sig­nif­i­cant down­sides.

Single Sided PCB

Click image for inter­ac­tive 3D mod­el
Load­ing …

My first attempt at a PCB was a two lay­ered sin­gle sided PCB, it is func­tion­al but not opti­mized as I decid­ed the approach was wrong and cre­at­ed a dou­ble sided PCB for man­u­fac­tur­ing.

It is a fair­ly long, sim­ple, PCB with a sim­ple flow left to right of the USB port, AVR chip and Grid­Eye sen­sor.

I cre­at­ed two ground planes, a shield plane around the out­side which is con­nect­ed to the USB shield and the screw holes, it is designed to be con­nect­ed to the chas­sis. The cen­ter of the board has a stan­dard dig­i­tal ground con­nect­ed to var­i­ous com­po­nents and the USB ground line. In my microwave sys­tem there should be a cen­tral (star) ground point, some­where else, which con­nects these two grounds. To pro­vide flex­i­bil­i­ty, main­ly for appli­ca­tions with­out a met­al chas­sis, there is an emp­ty 0603 pad in each cor­ner to bridge the two ground planes with either a capac­i­tor or a 0 ohm resis­tor .

After doing this lay­out I felt a two lay­er design would be much bet­ter. It would allow the board to be much small­er and I want­ed the sen­sor to be more cen­tral. Lat­er I learnt that the pro­to­type PCB man­u­fac­tur­ers all up their rates for boards over 5cm, so my 6cm board was fair­ly expen­sive. I swapped the large six pin con­nec­tor with a Tag-Con­nect con­nec­tor to try and be less ugly, with mixed suc­cess.

Two Sided PCB

Click image for inter­ac­tive 3D mod­el
Load­ing …

I start­ed this board more pro­fes­sion­al­ly, defin­ing a 3cm by 2cm board with M2 holes on each cor­ner. It was a lit­tle bit of a strug­gle to get every­thing to fit nice­ly but that prob­a­bly means it was the cor­rect size.

My main con­cern with the new design is that one of the USB data lines is also used in the pro­gram­ming process. I tried to make it as short as pos­si­ble but the pro­gram­ming con­nec­tor wouldn’t fit any­where but the far side of the board to the USB con­nec­tor. So that line is a long stub dur­ing oper­a­tion, not a nice thing to do to an RF sig­nal. Anec­do­tal evi­dence from forums sug­gests that I will get away with this but hav­ing the pro­gram­ming cable con­nect­ed will cause it to fail, I’m hap­py with that.

The Tag-Con­nect con­nec­tor can be seen on the far side to the USB port. It is actu­al­ly just a care­ful­ly arranged col­lec­tion of pads with holes to guide the plug. I haven’t used the Tag-Con­nect sys­tem before, I am attract­ed to it for a num­ber of rea­sons. The foot­print is small­er, in board size, only con­sum­ing one lay­er and not hav­ing a high part per­ma­nent­ly attached. Being a lay­out of pads it is cheap per board. And for man­u­fac­tur­ing it is easy to design a pogo pin set­up to hit the pads or use a bed of nails sys­tem. There is also a series of test points expos­ing the USB lines for man­u­fac­tur­ing.

Sev­er­al peo­ple have com­plained about the Tag-Con­nect rout­ing mean­ing that you take up as much board space as the stan­dard, larg­er, con­nec­tor. I cer­tain­ly found the rout­ing was annoy­ing, espe­cial­ly with the holes at either end requir­ing lines to go the long way around. I cheat­ed some­what by plac­ing vias on the pads, effec­tive­ly mak­ing some of the pins through holes, this made rout­ing much eas­i­er for me. For a two lay­ered board the Tag-Con­nect ben­e­fits are prob­a­bly mar­gin­al, with more lay­ers the ben­e­fits would be add up rapid­ly.

Ordering

An order has been placed at OSH­Park for both the Digikey board and mine, the process was remark­ably good, lots of feed­back as to what would be man­u­fac­tured as you pro­gressed. My board has an oval hole which OSH­Park doesn’t sup­port but I’ll fix that some­how after the board is deliv­ered.

The Digikey board 20.35x22.91 mm (0.8x0.9 inch­es) and cost $1.20 USD per board.
My board is 30.02x20.02 mm (the 0.02mm is the cut line thick­ness) and cost $1.55 USD per board.

With­in 24 hours both boards had been sent for fab­ri­ca­tion, mine got a free upgrade to the spe­cial rush order stream.

I have ordered an 0603 resis­tor and an 0603 capac­i­tor part book from Super Deal Tech­nol­o­gy with some emp­ty pages. The Digikey board uses 0804 parts (designed for old folks with fad­ing eye­sight) but I’ll just put 0603s onto the larg­er pads. Part books are by far the best way to man­age SMD com­po­nents.

The remain­ing parts have been ordered from Element14, Digikey was cheap­er on the parts but more expen­sive with ship­ping.

Weekly Wrap 4–10 April 2016

Cheesecake danish

CSIRO notebook

Attend­ed a car acci­dent on Mon­day with the SES.

Baked my first suc­cess­ful Dan­ish using an online recipe after two failed attempts fol­low­ing a recipe book. We ate one and gave one away to my Grand­fa­ther.

Designed my first PCB using KiCad and wrote up the expe­ri­ence.

Had my new engi­neer­ing note­books deliv­ered, offi­cial CSIRO stock. I had a ter­ri­ble time try­ing to find a decent book, my cur­rent one is an art book I picked up from Office­Works and it wasn’t ide­al. The cur­rent book has a few pages left, I’ll prob­a­bly tran­si­tion over to a new one in a week or two.

Using KiCad

I have been exper­i­ment­ing this week with cir­cuit design and pcb lay­out tools. My expe­ri­ence is with Altium but the price is rather hefty for my fair­ly sim­ple require­ments and while I have used Altium for a few years I nev­er actu­al­ly liked it, there are a lot of issues with the sys­tem. I con­sid­ered the var­i­ous online tools and Eagle before decid­ing to give KiCad a go.

KiCad is an open source bun­dle of tools which has been rapid­ly increas­ing in qual­i­ty over the last few years. CERN is pro­vid­ing pro­fes­sion­al devel­op­ment sup­port and they have recent­ly trans­ferred from a ‘build the source’ release struc­ture to stan­dard point releas­es.

I have played with KiCad for most of the week. It is good, I could do every­thing I need­ed to for the basic board I was doing, but some of it was a strug­gle. There are a lot of rough edges, how­ev­er the com­mu­ni­ty seems strong and most of the issues I encoun­tered are in the process of being fixed.

There are sev­er­al projects under the KiCad ban­ner which loose­ly inter­op­er­ate, it seems they have had vary­ing amounts of coor­di­na­tion over the years. Kicad itself is a project man­ag­er and appli­ca­tion lauch­er. Eeschema is the schemat­ic design soft­ware. Pcb­new does the PCB lay­out. There are oth­er tools I haven’t played with yet, such as a ger­ber view­er.

One of the issues is the coop­er­a­tion between these appli­ca­tions. For exam­ple the con­trols such as key­board short­cuts and mouse behav­iour are incon­sis­tent (This is flagged to be fixed by intro­duc­ing a glob­al short­cut man­ag­er). For a while (since fixed) pcb­new had pan­el­iza­tion fea­tures avail­able when launched stand­alone but not when launched from with­in kicad . These sort of prob­lems mean that it feels more like using sev­er­al dif­fer­ent pro­grams than a uni­fied suite.

Breaking news

I have pub­lished a write­up of the board I designed, at https://david.tulloh.id.au/grideye-usb/.

Eeschema

Eeschema screenshot

Eeschema is nice and famil­iar, you can place parts, con­nect wires, cre­ate named nets etc. I had a very sim­ple five com­po­nent board so had no need of the advanced fea­tures. How­ev­er there was obvi­ous func­tion­al­i­ty for bus­es and a fair bit of sup­port for nest­ed sheets. There is anno­ta­tion tool to name your parts and a basic rule check­er to catch mis­takes.

Bonus

A nice bonus for Eeschema is the abil­i­ty to have two names on a net. This is a bit con­tro­ver­sial, Altium for­bids it but I like it. Some times a line has two roles, such as being the MISO com­mu­ni­ca­tion line dur­ing pro­gram­ming and the I2C inter­rupt line dur­ing nor­mal oper­a­tion. I like being able to cre­ate a named net for each role and con­nect both to the pin of the chip. The PCB lay­out pro­gram needs a sin­gle name, Eeschema han­dles this by arbi­trar­i­ly pick­ing one of them.

Missing Feature

Altium has a fea­ture they call direc­tives. This allows a pair of wires to be iden­ti­fied to be rout­ed as a dif­fer­en­tial pair. You can also spec­i­fy net class­es, so as to spec­i­fy increased track widths for the pow­er rail or the required clear­ance on a high volt­age track. KiCad does allow this to be done in Pcb­new but I feel the schemat­ic, as the doc­u­men­ta­tion for the design, should con­tain this infor­ma­tion. This is par­tic­u­lar­ly impor­tant if the lay­out and design are per­formed by dif­fer­ent peo­ple.

Awkward

Eeschema’s use of drag­ging with the left mouse but­ton is odd. In most appli­ca­tions this would per­form a group select, in eeschema it selects and begins to move the com­po­nents. Copy/paste is done by hold­ing down shift before doing a selec­tion. The odd­ness and learn­ing curve aside, this doesn’t scale well. There is no way of select­ing a group of objects so you can’t do a group delete, you can’t change the prop­er­ties of a group or resize mul­ti­ple wires togeth­er. Using the copy/paste you can’t dou­ble check what you have select­ed before doing a copy, mul­ti­ple pastes require the full process to be run again and you can’t change sheets. The move is still the action regard­less of the tool select­ed, so drag­ging with the wire tool actu­al­ly does a select/move and plac­ing a box like a sub-sheet must be done with two clicks not a drag.

I sus­pect the select behav­iour will be changed in the same batch of work as the short­cut improve­ments.

Ugly

I should open by say­ing I couldn’t real­ly get my head around the schemat­ic libraries. My under­stand­ing is that a library file can hold mul­ti­ple com­po­nents but I couldn’t fig­ure out how to put a sec­ond com­po­nent into a library file. I did see notes sug­gest­ing that you merge two libraries by edit­ing them by hand.

Sev­er­al peo­ple have cre­at­ed their own tools to try and assist man­ag­ing libraries. The exis­tence of these tools indi­cates that many oth­ers have also encoun­tered prob­lems.

There is hid­den mag­ic behind the library process. For exam­ple to cre­ate a pow­er com­po­nent, basi­cal­ly a pow­er net flag, the pin must be hid­den. The pin still gets a wire con­nect­ed to it but if it is not hid­den it doesn’t con­nect to the pow­er net and you get uncon­nect­ed errors when run­ning the rule check. This isn’t doc­u­ment­ed, the nice folks in the IRC chan­nel explained it to me.

There is also doc­u­ment­ed hid­den mag­ic where some parts, for­tu­nate­ly none I used, have hid­den VCC pins so they mag­i­cal­ly get the pow­er rail with­out clut­ter­ing your schemat­ic. Which is not so use­ful in the mod­ern envi­ron­ment of mul­ti­ple sig­nal lev­els.

The devel­op­ers are well aware of all of these issues, half the roadmap entries for eeschema are relat­ed to com­po­nent edit­ing. The plan seems to be to migrate the back­end of the schemat­ic library to the pcb library file for­mat and work. Then build bet­ter edit­ing tools on top. The PCB library tool is a sig­nif­i­cant step for­ward.

Pcbnew

Eeschema screenshot

It took me a while to realise that there are actu­al­ly three dif­fer­ent PCB pro­grams bun­dled into Pcb­new. They are list­ed in the view menu as three dif­fer­ent dis­play modes: default, OpenGL, and Cairo. This is not, as you might expect, just a dif­fer­ent dis­play engine. Some fea­tures are not avail­able in all modes and some fea­tures work dif­fer­ent­ly depend­ing which mode you are in. I found Cairo ran very slow­ly on my poor ancient lap­top so I just used default and OpenGL.

Dif­fer­en­tial rout­ing is a rel­a­tive­ly new fea­ture and is only imple­ment­ed in OpenGL. In the default view the fea­ture on the menu is sim­ply dis­abled, grayed out, no feed­back is pro­vid­ed as to how to enable it.

There are oth­er, less­er issues:

  • In GL mode the scroll bar arrows don’t work, drag­ging does.
  • Rub­ber band drag mode only works in default mode.
  • In nor­mal mode delet­ing a track deletes the attached via, in GL mode it does not.
  • In nor­mal mode the start track short­cut starts a track imme­di­ate­ly, in GL mode it waits for a click.

There is a 3D mod­el fea­ture which uses VRML world files for each part. How­ev­er it only sup­ports the sub­set gen­er­at­ed by wings3d, more com­plex files silent­ly fail. Extend­ing this to oth­er mod­el types is on the roadmap.

Some oth­er stuff feels a bit incom­plete:

  • Hid­ing a cop­per lay­er still shows the pads.
  • There is a “Hide all cop­per lay­ers but active” option for sin­gle sided work but it doesn’t hide the oth­er side’s silkscreen.
  • The rule-check doesn’t enforce track width.

Final­ly the library man­age­ment is bet­ter than Eescheema’s but still needs a lot of work.

  • Rel­a­tive paths require man­u­al­ly using an envi­ron­ment vari­able, which was list­ed in the Eeschema library man­ag­er but not Pcbnew’s.
  • There is a plu­g­in to add github based repos­i­to­ries, but the option is list­ed even if the plu­g­in is not installed.
  • There is a plu­g­in to add github based repos­i­to­ries, not git based, it uses a github web­page URL.
  • Adding a library doesn’t check that the library exists, works or is valid. An error is shown lat­er when you try and use it.
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